Semiconductor device and process for producing the same

ABSTRACT

A semiconductor device having a highly reliable groove isolation structure with a desired radius of curvature formed at the groove upper edge and without formation of any step, there is produced by reducing the stress generation around the groove upper edge of an element isolation groove on a semiconductor substrate, thereby optimizing the shape of an element isolation groove and making the device finer and improving the device electric characteristics.

TECHNICAL FIELD

The present invention relates to a semiconductor device having a highlyreliable groove isolation structure and a process for producing thesame.

BACKGROUND ART

A shallow groove isolation (SGI) structure is now available to make anelectrical insulation or isolation between adjacent elements such astransistors, etc. on a semiconductor substrate. As shown in FIGS. 1A to1D, the SGI structure typically comprises a shallow groove formed on asemiconductor substrate 31 of silicon and an oxide film 35 and the likeembedded in the groove and is suitable for devices requiring processingdimensional precision of 0.25 μm or under, because its processingdimensional precision is higher than that of the structure so far bylocal oxidation of silicon (LOCOS). However, the SGI structure sometimessuffers from formation of sharp protrusions 34 of semiconductorsubstrate 31 of silicon formed in the oxide film 35 formed by oxidationat the upper edge of the groove during the oxidation step, as shown inFIG. 1C. The presence of such sharp protrusions 34 of semiconductorsubstrate 31 of silicon causes concentration of electric fields aroundthe protrusions during the circuit operation, sometimes deterioratinggate breakdown voltage or capacitance, as disclosed, for example, by A.Bryant et al (Technical Digest of IEDM '94, pp. 671-674). It is knownfrom experiences that such deterioration of gate breakdown voltageoccurs when the radius of curvature of the substrate is not more than 3nm around the groove upper edge, even if the angle of substrate is notless than 90° around the groove upper edge. To overcome thedeterioration, pad oxide film 32 of FIG. 1B is recessed backwards byabout 0.1 μm as shown in FIG. 1B′ and oxidized with an oxidant,preferably steam at a temperature of about 1,000° C. to form a desiredradius of curvature at the groove upper edges, as disclosed inJP-A-2-260660.

Even though the desired radius curvature can be obtained by the priorart procedure, step (or unevenness) 44 is formed on the upper surface ofsemiconductor substrate of silicon 31 around the groove upper edge, asshown in FIG. 1C′. Such step 44 can be formed presumably due to thefollowing mechanism. That is, semiconductor substrate 31 of silicon hasa silicon-exposed region and a silicon-unexposed region in the recessedarea at the edge of pad oxide film 32; the silicon-exposed regionundergoes faster oxidant diffusion, i.e. faster oxidation, than thesilicon-unexposed region, resulting in formation of step 44 at the edgeof pad oxide film 32 as a boundary. Gate oxide film 37, when formed insuch a step region, has an uneven thickness, which leads to variationsof electrical properties. Furthermore, stresses are liable toconcentrate therein, resulting in a possible decrease in the electricalreliability of a transistors to be formed on step 44.

Further, the silicon oxide film 36 is deposited on the semiconductorsubstrate 31 by chemical vapor deposition (CVD) to embed the siliconoxide film 36 in the groove and then the semiconductor substrate 31 isheat treated to sinter the silicon oxide film 36 embedded in the groove.Sintering is carried out for improving the quality of the silicon oxidefilm 36 embedded in the groove. If the sintering is insufficient, voidsare often generated in the groove in the subsequent steps.

Furthermore, it is said that wet or steam oxidation is effective forsintering the silicon oxide film 36 embedded in the groove, but the wetor steam oxidation is liable to oxidize the inside, particularly sidewall, of the groove. Oxidation starts from the groove surface and thusthe groove bottom is less oxidized. Once the groove side wall isoxidized, the active region is narrowed. This is another problem.Thicker oxide film will cause a larger stress on the boundary betweenthe oxide film and the substrate and the once rounded shoulder edge willreturn to the original sharp one and crystal defects are also generated.This is a further problem. To overcome these problems, it was proposedto provide a silicon nitride film along the groove inside wall.

According to a process for forming a groove, disclosed in JP-A-8-97277,a groove is trenched on a silicon substrate at first, and then an oxidefilm is formed on the groove inside surfaces (side wall and bottomsurfaces) by heat oxidation, followed by further formation of a siliconnitride film thereon and still further formation of a silicon film suchas anyone of amorphous, polycrystalline and monocrystalline siliconfilms on the silicon nitride film. Then, the groove is embedded with asilicon oxide film completely, followed by flattening of the groove top.After the deposition of the silicon oxide film on the entire surface ofsubstrate, but before the fattening, the silicon film is oxidized in anoxidizing atmosphere including steam at about 950° C. to convert it to asilicon oxide film. The silicon substrate is not oxidized during theoxidation, because the silicon substrate is protected by the siliconnitride film. According to the process, a film having a goodcompatibility with a silicon oxide film, i.e. a silicon film is formedas a thin film on the groove inside surfaces and thus the groove can beembedded with the silicon oxide film without any remaining voids in thegroove. The silicon film in the groove must be then converted to asilicon oxide film by oxidation, but the silicon nitride film isprovided between the silicon film and the silicon substrate, the siliconsubstrate is never oxidized during the oxidation of the silicon film.That is, no device characteristics are deteriorated at all.

In the above-mentioned prior art processes for forming a groove, heattreatment is carried out at a high temperature such as 1,000° C. orhigher to round the shoulder edge of element isolation groove. However,large-dimension wafers are liable to undergo dislocation, which willserve as nuclei for defects, by heat treatment at a high temperaturesuch as 1,000° C. or higher, and thus a heat-treatment process at a hightemperature such as 1,000° C. or higher would be hard to use in view ofthe future trend to use much larger-dimension wafers. In the heattreatment at a low temperature such as less than 1,000° C., it is hardto round the shoulder edge of element isolation groove.

DISCLOSURE OF THE INVENTION

An object of the present invention is to provide a semiconductor devicewith a desired radius of curvature formed at the groove upper end andwithout formation of any step there, and also a process for producingthe same.

The object of the present invention can be attained by reducing thestress generation around the groove upper end of an element isolationgroove on a semiconductor substrate.

Another object of the present invention is to provide a novel techniqueof optimizing the shape of an element isolation groove, thereby makingthe device finer and improving the device electric characteristics.

Other object of the present invention is to provide a novel technique ofreducing an adverse effect of stresses to an active region due to thesintering of a silicon oxide film embedded (or buried) in an elementisolation groove on the device characteristics.

The present invention provides a process for producing a semiconductordevice, which comprises the following steps:

(1) a step of forming a pad oxide film having a thickness of at least 5nm, preferably at least 10 nm on a circuit-forming side of asemiconductor substrate (or a silicon substrate),

(2) a step of forming an anti-oxidation film on the pad oxide film,

(3) a step of trenching a groove to a desired depth at a desiredposition on the circuit-forming side of the semiconductor substrate,

(4) a step of recessing the pad oxide film to an extent of 5 nm-40 nmfrom the inside wall of the groove,

(5) a step of oxidizing the inside wall of the groove trenched on thesemiconductor surface,

(6) a step of embedding an isolation film in the oxidized groove,

(7) a step of removing the embedding isolation film formed on theanti-oxidation film,

(8) a step of removing the anti-oxidation film formed on thecircuit-forming side of the semiconductor substrate, and

(9) a step of removing the pad oxide film formed on the circuit-formingside of the semiconductor substrate.

The present invention further provides a semiconductor device whichcomprises a semiconductor (or silicon) substrate and an elementisolation oxide film having a groove isolation structure formed on thecircuit-forming side of the semiconductor substrate, where the substratehas a monotonously convexed shape around the upper edge of the groove ofthe groove isolation structure; the oxide film is oxidized to have athickness of 5 to 70 nm, preferably 30 to 70 nm at the inside wall ofthe groove at the intermediate level of the groove isolation structure;and the semiconductor substrate has a radius of curvature in a range of3 to 35 nm at the upper edge of the groove thereof.

The present invention further provides a process for producing asemiconductor device, which comprises the following steps:

(a) a step of thermally oxidizing a semiconductor (or silicon)substrate, thereby forming a first silicon oxide film as a pad oxidefilm on the principal side (or surface) of the semiconductor substrate,then depositing a silicon nitride film as an anti-oxidation film on thefirst silicon oxide film, and then selectively etching the siliconnitride film, the first silicon oxide film and the semiconductorsubstrate residing in an element isolation region while masking anelement region, thereby trenching a groove on the principal side (orsurface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region to an extent of 5to 40 nm,

(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groovewithin the range for filling the second silicon oxide film in the recessspace formed up to the edge of the recessed first silicon oxide film androunding the shoulder edge of the groove at the same time,

(d) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide film in the groove,

(e) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the groove,

(f) a step of removing the third silicon oxide film on the siliconnitride film, while leaving the third silicon oxide film only in thegroove, thereby forming an element isolation groove embedded with thethird silicon oxide film, and

(g) a step of removing the silicon nitride film on the surface of theactive region whose circumference is confined by the element isolationgroove and then forming a semiconductor element in the active region.

The present invention further provides a process for producing asemiconductor device, which comprises the following steps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film on the principal side (or surface) ofthe semiconductor substrate, then depositing a silicon nitride film onthe first silicon oxide film, and then selectively etching the siliconnitride film and the first silicon oxide film residing in an elementisolation region while masking an element region,

(b) a step of isotropically and shallowly etching the surface of thesemiconductor substrate in the element isolation region, therebyproviding an undercut on the semiconductor substrate at the edge of theelement isolation region,

(c) a step of selectively etching the semiconductor substrate in theelement isolation region, thereby trenching a groove on the principalside (or surface) of the semiconductor substrate,

(d) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groove androunding the shoulder edge of the groove at the same time,

(e) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide film in the groove,

(f) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the groove,

(g) a step of removing the third silicon oxide film on the siliconnitride film, while leaving the third silicon oxide film only in thegroove, thereby forming an element isolation groove embedded with thethird silicon oxide film, and

(h) a step of removing the silicon nitride film on the surface of anactive region whose circumference is confined by the element isolationgroove and then forming a semiconductor element in the active region.

The present invention further provides numbers of variations of theabove-mentioned processes.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A to 1D and 1B′ and 1C′ schematically show steps of producing agroove isolation structure by the conventional selective oxidationprocess.

FIGS. 2A to 2I schematically show steps of producing a groove isolationstructure according to a first embodiment of the present invention.

FIG. 3 is a flow chart showing steps of producing a groove isolationstructure according to the first embodiment of the present invention.

FIG. 4 is a diagram showing the working and effect of the firstembodiment of the present invention.

FIGS. 5A and 5B show the working and effect of the first embodiment ofthe present invention.

FIG. 6 is a flow chart showing steps of producing a groove isolationstructure according to a second embodiment of the present invention.

FIG. 7 is a diagram showing the working and effect of the secondembodiment of the present invention.

FIG. 8 is a flow chart showing steps of producing a groove isolationstructure according to a third embodiment of the present invention.

FIG. 9 is a flow chart showing steps of producing a groove isolationstructure according to a fourth embodiment of the present invention.

FIG. 10 is a diagram showing the working and effect of the fourthembodiment of the present invention.

FIGS. 11 to 32 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 5 of the present invention.

FIGS. 33 to 36 are cross-sectional elevation views of essential part ofa semiconductor device according to Example 6 of the present invention.

FIGS. 37 to 44 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 7 of the present invention.

FIGS. 45 to 48 are cross-sectional elevation view of essential part of asemiconductor substrate showing a process for producing a semiconductordevice according to Example 8 of the present invention.

FIGS. 49 to 50 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 9 of the present invention.

FIGS. 51 to 54 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 10 of the present invention.

FIGS. 55 to 58 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 11 of the present invention.

FIGS. 59 to 64 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 12 of the present invention.

FIGS. 65 and 66 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 13 of the present invention.

FIGS. 67 and 68 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 14 of the present invention.

FIGS. 69 and 70 are cross-sectional elevation views of essential part ofa semiconductor substrate showing a process for producing asemiconductor device according to Example 15 of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

The present process for producing a semiconductor device comprises thefollowing steps:

(1) a step of forming a pad oxide film such as a silicon oxide film to athickness of at least 5 nm, preferably at least 10 nm, on acircuit-forming side of a semiconductor substrate,

(2) a step of forming an anti-oxidation film such as a silicon nitridefilm on the pad oxide film,

(3) a step of partially removing the anti-oxidation film and the padoxide film from a desired position on the circuit-forming side of thesemiconductor substrate and further trenching a groove to a desireddepth at that position on the surface of the semiconductor substrate,

(4) a step of recessing (or partially removing) the pad oxide film fromthe edge side of the remaining anti-oxidation film on the basis of thesurface of the semiconductor substrate to an extent of 5 to 40 nm byetching,

(5) a step of heat (or thermal) oxidizing the inside wall of the groovetrenched on the semiconductor substrate preferably in an oxidativeatmosphere having a gas ratio of H₂/O₂ of less than 0.5 within the rangefor filling the resulting oxide in the recess space (clearance betweenthe surface of the substrate and the anti-oxidation film) formed up tothe edge of the recessed pad oxide film,

(6) a step of embedding (or burying) an embedding isolation film in theoxidized groove,

(7) a step of removing the embedding isolation film formed on theanti-oxidation film,

(8) a step of removing the anti-oxidation film formed on thecircuit-forming side of the semiconductor substrate, and

(9) a step of removing the pad oxide film formed on the circuit-formingside of the semiconductor substrate.

In the above-mentioned process, the shoulder edge of the groove can bemore effectively improved by providing a partial undercut a below thepad oxide film 2, as shown in FIG. 34, before trenching the groove.

In the present semiconductor device comprising a semiconductor substrateand an element isolation oxide film having a groove isolation structureformed on the circuit-forming side of the semiconductor substrate,produced by the above-mentioned process, the substrate has no step onthe upper surface, but a monotonously convexed shape around the upperedge of the groove of the groove isolation structure; the oxide film isoxidized to have a thickness t of 5 to 70 nm, preferably 30 to 70 nm atthe inside wall of the groove at the intermediate level of the grooveisolation structure, as shown in FIG. 10; and the semiconductorsubstrate has a radius of curvature in a range of 3 to 35 nm at theupper edge of the groove thereof.

Typical processes of those to be disclosed herein will be brieflyoutlined below:

According to a first typical aspect of the present invention, a processfor producing a semiconductor device comprises the following steps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film as a pad oxide film on the principalside (or surface) of the semiconductor substrate, then depositing asilicon nitride film as an anti-oxidation film on the first siliconoxide film, and then selectively etching the silicon nitride film, thefirst silicon oxide film and the semiconductor substrate residing in anelement isolation region while masking an element region, therebytrenching a groove on the principal side (or surface) of thesemiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film to anextent of 5 to 40 nm from the groove inside wall towards an activeregion,

(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groovewithin the range for filling the second silicon oxide film in the recessspace formed up to the edge of the recessed first silicon oxide film androunding the shoulder edge of the groove at the same time,

(d) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide film in the groove,

(e) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the groove,

(f) a step of removing the third silicon oxide film on the siliconnitride film, while leaving the third silicon oxide film only in thegroove, thereby forming an element isolation groove embedded with thethird silicon oxide film, and

(g) a step of removing the silicon nitride film on the surface of theactive region whose circumference is confined by the element isolationgroove and then forming a semiconductor element in the active region.

In the first typical aspect of the present process, a thermallyoxidizing temperature for forming the first silicon oxide film, athermally oxidizing temperature for forming the second silicon oxidefilm and a heat-treating (or annealing) temperature for sintering thethird silicon oxide film are all not more than 1,000° C.

In the first typical aspect of the present process, the thermallyoxidizing temperature for forming the second silicon oxide film is from8000 to 1,000° C.

In the first typical aspect of the present process for producing asemiconductor device, the groove has a taper angle θ of not more than85°.

In the first typical aspect of the present process, the inside wall ofthe groove is subjected to an soft nitriding treatment after the step(c) but before the step (d), thereby forming a silicon nitride layer inan area near the boundary between the second silicon oxide film formedon the inside wall of the groove and the active region of thesemiconductor substrate.

In the first typical aspect of the present process, an area near theboundary between the second silicon oxide film formed on the inside wallof the groove and a element isolation region of the semiconductorsubstrate is subjected to nitrogen ion implantation after the step (c)but before the step (d), thereby forming a silicon nitride layer in thearea near the second silicon oxide film formed on the inside wall of thegroove and the element isolation region of the semiconductor substrate.

In the first typical aspect of the present process, the third siliconoxide film on the silicon nitride film is removed after the step (d),while leaving the third silicon oxide film only in the groove, therebyforming an element isolation groove embedded with the third siliconoxide film, and then heat-treating (or annealing) the semiconductorsubstrate, thereby sintering the third silicon oxide film embedded inthe groove.

In the first typical aspect of the present process, the step (c) iscarried out in a nitrogen-containing atmosphere, thereby forming asecond silicon nitride film on the inside wall of the groove just beforefully filling the space formed by recess of the pad oxide film, androunding the shoulder edge of the groove at the same time.

In the first typical aspect of the present process, a second siliconnitride film is formed at least on the surface of the second siliconoxide film after the step (c) but before the step (d).

According to a second typical aspect of the present invention, a processfor producing a semiconductor device comprises the following steps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a pad oxide film (a first silicon oxide film) on the principalside (or surface) of the semiconductor substrate, then depositing asilicon nitride film on the first silicon oxide film, and thenselectively etching the silicon nitride film and the first silicon oxidefilm residing in an element isolation region while masking an elementregion,

(b) a step of isotropically and shallowly etching the semiconductorsubstrate in the element isolation region, thereby forming the undercuton the semiconductor substrate at the edge of the element isolationregion,

(c) a step of selectively etching the semiconductor substrate in theelement isolation region, thereby trenching a groove on the principalside (or surface) of the semiconductor substrate,

(d) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groove androunding the shoulder edge of the groove at the same time,

(e) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide film in the groove,

(f) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the groove,

(g) a step of removing the third silicon oxide film on the siliconnitride film, while leaving the third silicon oxide film only in thegroove, thereby forming an element isolation groove embedded with thethird silicon oxide film, and

(h) a step of removing the silicon nitride film on the surface of anactive region whose circumference is confined by the element isolationgroove, and then forming a semiconductor element in the active region.

According to a third typical aspect of the present invention, a processfor producing a semiconductor device comprises the following steps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film on the principal side (or surface) ofthe semiconductor substrate, then depositing a first silicon nitridefilm on the first silicon oxide film and then selectively etching thefirst silicon nitride film, the first silicon oxide film and thesemiconductor substrate residing in an element isolation region whilemasking an element region, thereby trenching a groove on the principalside (or surface) of the semiconductor substrate.

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove to an extent of 5 to 40 nm towards anactive region,

(c) a step of thermally oxidizing the semiconductor device, therebyforming a second silicon oxide film on the inside wall of the groove inthe range for filling the second silicon oxide film in the recess spaceformed up to the recessed first silicon oxide film, and rounding theshoulder edge of the groove at the same time,

(d) a step of depositing a second silicon nitride film on thesemiconductor substrate including the inside of the groove by chemicalvapor deposition,

(e) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide film in the groove,

(f) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the groove,

(g) a step of removing the third silicon oxide film and the secondsilicon nitride film on the first silicon nitride film, while leavingthe third silicon oxide film and the second silicon nitride film only inthe groove, thereby forming an element isolation groove embedded withthe third silicon oxide film and the second silicon nitride film,

(h) a step of removing the first silicon nitride film on the surface ofthe active region whose circumference is confined by the elementisolation groove by etching,

(i) a step of thermally oxidizing the third silicon oxide film in theelement isolation groove, thereby increasing the thickness of the filmand filling a recess formed by simultaneous removal of the secondsilicon nitride film at the shoulder edge of the element isolationgroove during the removal of the first silicon nitride film by etching,and

(j) a step of forming a semiconductor element in the active region.

According to a fourth typical aspect of the present invention, a processfor producing a semiconductor device comprises the following steps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film on the principal side (or surface) ofthe semiconductor substrate, then depositing a first silicon nitridefilm on the first silicon oxide film, and then selectively etching thefirst silicon nitride film, the first silicon oxide film and thesemiconductor substrate residing in an element isolation zone whilemasking an element region, thereby trenching a groove on the principalside (or surface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region to an extent of 5to 40 nm,

(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groove inthe range for filling the second silicon oxide film in the recess spaceformed up to the recessed first silicon oxide film, and rounding theshoulder edge of the groove at the same time,

(d) a step of depositing a second silicon nitride film on thesemiconductor substrate including the inside of the groove by chemicalvapor deposition,

(e) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide in the groove,

(f) a step of removing the third silicon oxide film and the secondsilicon nitride film on the first silicon nitride film, while leavingthe third silicon oxide film and the second silicon nitride film only inthe groove, thereby forming an element isolation groove embedded withthe third silicon oxide film and the second silicon nitride film,

(g) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the grooveand oxidizing the surface of the first silicon nitride film and thesurface of the second silicon nitride film on the shoulder edge of theelement isolation groove,

(h) a step of removing the first silicon nitride film on the surface ofthe active region whose circumference is confined by the elementisolation groove and the oxide film on the surface of the first siliconnitride film by etching, and

(i) a step of forming a semiconductor element in the active region.

According to the fifth typical aspect of the present invention, aprocess for producing a semiconductor device comprises the followingsteps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film (a pad oxide film) on the principalside (or surface) of the semiconductor substrate, then depositing asilicon nitride film on the first silicon oxide film, and thenselectively etching the silicon nitride film, the first silicon oxidefilm and the semiconductor substrate residing in an element isolationregion while masking an element region, thereby trenching a groove onthe principal side (or surface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region to an extent of 5to 40 nm,

(c) a step of depositing a second silicon oxide film (an embedded oxidefilm) on the principal side (or surface) of the semiconductor substrate,thereby embedding the second silicon oxide film in the groove,

(d) a step of thermally oxidizing the semiconductor substrate, therebysintering the second silicon oxide film embedded in the groove, forminga third silicon oxide film (a heat oxide film) on the inside wall of thegroove and rounding the shoulder edge of the groove at the same time,

(e) a step of removing the second silicon oxide film on the siliconnitride film, while leaving the second silicon oxide film only in thegroove, thereby forming an element isolation groove embedded with thesecond silicon oxide film, and

(f) a step of removing the silicon nitride film on the surface of theactive region whose circumference is confined by the element isolationgroove, and then forming a semiconductor element in the active region.

According to a sixth typical aspect of the present invention, a processfor producing a semiconductor device comprises the following steps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film (a pad oxide film) on the principalside (or surface) of the semiconductor substrate, then depositing asilicon nitride film on the first silicon oxide film, and thenselectively etching the silicon nitride film, the first silicon oxidefilm and the semiconductor substrate residing in an element isolationregion while masking an element region, thereby trenching a groove onthe principal side (or surface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region to an extent of 5to 40 nm,

(c) a step of depositing a second silicon oxide film (an embedded oxidefilm) on the principal side (or surface) of the semiconductor substrate,thereby embedding the second silicon oxide film in the groove,

(d) a step of removing the second silicon oxide film on the siliconnitride film, while leaving the second silicon oxide film only in thegroove, thereby forming an element isolation groove embedded with thesecond silicon oxide film,

(e) a step of thermally oxidizing the semiconductor substrate, therebysintering the second silicon oxide film embedded in the groove, forminga third silicon oxide film (a heat oxide film) on the inside wall of thegroove and rounding the shoulder edge of the groove at the same time,and

(f) a step of removing the silicon nitride film on the surface of theactive region whose circumference is confined by the element isolationgroove, and then forming a semiconductor element in the active region.

According to a seventh typical aspect of the present invention, aprocess for producing a semiconductor device comprises the followingsteps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film on the principal side (or surface) ofthe semiconductor substrate, then depositing a silicon nitride film onthe first silicon oxide film, and then selectively etching the siliconnitride film, the first silicon oxide film and the semiconductorsubstrate residing in an element isolation region while masking anelement region, thereby trenching a groove on the principal side (orsurface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region to an extent of 5to 40 nm,

(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groove inthe range for filling the second silicon oxide film in the recess spaceformed up to the edge of the recessed first silicon oxide film, androunding the shoulder edge of the groove at the same time,

(d) a step of depositing a polycrystalline silicon film on the principalside (or surface) of the semiconductor substrate,

(e) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide film in the groove,

(f) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the grooveand oxidizing the polycrystalline silicon film to convert at least aportion thereof to a silicon oxide film,

(g) a step of removing the third silicon oxide film and the siliconoxide film on the silicon nitride film, while leaving the third siliconoxide film and the silicon oxide film only in the groove, therebyforming an element isolation groove embedded with the third siliconoxide film and the silicon oxide film, and

(h) a step of removing the silicon nitride film on the surface of theactive region whose circumference is confined by the element isolationgroove, and then forming a semiconductor element in the active region.

According to an eighth typical aspect of the present invention, aprocess for producing a semiconductor device comprises the followingsteps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film on the principal side (or surface) ofthe semiconductor substrate, then depositing a silicon nitride film onthe first silicon oxide film, and then selectively etching the siliconnitride film, the first silicon oxide film and the semiconductorsubstrate residing in an element isolation region while masking anelement region, thereby trenching a groove on the principal side (orsurface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region to an extent of 5to 40 nm,

(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groove inthe range for filling the second silicon oxide film in the recess spaceformed up to the edge of recessed first silicon oxide film and roundingthe shoulder edge of the groove at the same time,

(d) a step of depositing a polycrystalline silicon film on the principalside (or surface) of the semiconductor substrate,

(e) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide film in the groove,

(f) a step of removing the third silicon oxide film and thepolycrystalline silicon film on the silicon nitride film, while leavingthe third silicon oxide film and the polycrystalline silicon film in thegroove, thereby forming an element isolation groove embedded with thethird silicon oxide film and the polycrystalline silicon film,

(g) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the grooveand oxidizing the polycrystalline silicon film to convert at least aportion thereof to a silicon oxide film, and

(h) a step of removing the silicon nitride film on the surface of theactive region whose circumference is confined by the element isolationgroove, and then forming a semiconductor element in the active region.

According to a ninth typical aspect of the present invention, a processfor producing a semiconductor device comprises the following steps:

(a) a step of oxidizing a semiconductor substrate, thereby forming afirst silicon oxide film (a pad oxide film) on the principal side (orsurface) of the semiconductor substrate, then depositing a siliconnitride film on the first silicon oxide film, and then selectivelyetching the silicon nitride film, the first silicon oxide film and thesemiconductor substrate residing in an element isolation region whilemasking an element region, thereby trenching a groove on the principalside (or surface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region in an extent of 5to 40 nm,

(c) a step of heat-nitriding the semiconductor substrate, therebyforming a second silicon nitride on the inside wall of the groove,

(d) a step of depositing a second silicon oxide film (an embedded oxidefilm) on the principal side (or surface) of the semiconductor substrate,thereby embedding the second silicon oxide film in the groove,

(e) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the second silicon oxide film embedded in the groove,

(f) a step of removing the second silicon oxide film on the firstsilicon nitride film, while leaving the second silicon oxide film onlyin the groove, thereby forming an element isolation groove embedded withthe second silicon oxide film, and

(g) a step of removing the first silicon nitride film on the surface ofthe active region whose circumference is confined by the elementisolation groove, and then forming a semiconductor element in the activeregion.

According to the tenth typical aspect of the present invention, aprocess for producing a semiconductor device comprises the followingsteps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film on the principal side (or surface) ofthe semiconductor substrate, then depositing a silicon nitride film onthe first silicon oxide film, and then selectively etching the siliconnitride film, the first silicon oxide film and the semiconductorsubstrate residing in an element isolation region while masking anelement region, thereby trenching a groove on the principal side (orsurface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region in an extent of 5to 40 nm,

(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groove,and then nitriding the second silicon oxide film, thereby converting atleast a portion thereof to a silicon nitride film,

(d) a step of depositing a third silicon oxide film on the principalside (or surface) of the semiconductor substrate, thereby embedding thethird silicon oxide film in the groove,

(f) a step of removing the third silicon oxide film on the first siliconnitride film, while leaving the third silicon oxide film only in thegroove, thereby forming an element isolation groove embedded with thethird silicon oxide film, and

(g) a step of removing the first silicon nitride film on the surface ofthe active region whose circumference is confined by the elementisolation groove, and then forming a semiconductor element in the activeregion.

According to the eleventh typical aspect of the invention, a process forproducing a semiconductor device comprises the following steps:

(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film (a pad oxide film) on the principalside (or surface) of the semiconductor substrate, then depositing asilicon nitride film on the first silicon oxide film, and thenselectively etching the silicon nitride film, the first silicon oxidefilm and the semiconductor substrate residing in an element isolationregion while masking an element region, thereby trenching a groove onthe principal side (or surface) of the semiconductor substrate,

(b) a step of etching the first silicon oxide film exposed to the insidewall of the groove, thereby recessing the first silicon oxide film fromthe inside wall of the groove towards an active region to an extent of 5to 40 nm,

(c) a step of depositing a polycrystalline silicon film on thesemiconductor substrate, and then nitriding the polycrystalline siliconfilm, thereby converting at least a portion thereof to a silicon nitridefilm,

(d) a step of depositing a second silicon oxide film (an embedded oxidefilm) on the principal side (or surface) of the semiconductor substrate,thereby embedding the second silicon oxide film in the groove,

(e) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the second silicon oxide film embedded in the groove,

(f) a step of removing the second silicon oxide film on the firstsilicon nitride film, while leaving the second silicon oxide film onlyin the groove, thereby forming an element isolation groove embedded withthe second silicon oxide film, and

(g) a step of removing the first silicon nitride film on the surface ofthe active region whose circumference is confined by the elementisolation groove, and then forming a semiconductor element in the activeregion.

The embodiments of the present invention will be described in detailbelow, referring to drawings, where members having the same functionwill be identified with the same reference numerals throughout thedrawings illustrating the embodiments of the present invention to omitrepeat explanation.

EXAMPLE 1

Steps of producing a groove isolation structure of a semiconductordevice according to the first embodiment of the present invention willbe explained below, referring to FIGS. 2A to 2I and FIG. 3.

FIGS. 2A to 2I are cross-sectional structured elevation views of asemiconductor device according to the present process and FIG. 3 is aflow chart showing outlines of steps of the process. Steps will beexplained, referring to FIGS. 2A to 2I according to the flow chart ofFIG. 3.

(1) The surface of silicon substrate 31 was thermally oxidized to form apad oxide film 32 having a thickness of about 10 nm (101 and 102 in FIG.3).

(2) Silicon nitride film 42 was deposited to a thickness of about 200 nmon pad oxide film 32 and used as an anti-oxidation film when elementisolation, thermally oxidized film 35 was formed (103 in FIG. 3).

(3) Photoresist 43 was formed on silicon nitride film 42 (104 in FIG.3).

(4) Photoresist 43 at a desired position was removed by an ordinarylight exposure procedure, and then parts of silicon nitride film 42, patoxide film 32 and silicon substrate 31 were removed by etching, and ashallow groove was trenched at a predetermined angle of the inside wallof the groove to the surface of silicon substrate 31 (for example, at anangle of 95° to 110° as shown by A in FIG. 2D) (105 to 107 in FIG. 3).

(5) Photoresist 43 was removed and then pad oxide film 32 was recessed(or partially removed) in an extent of 5 to 40 nm by etching (108 and109 in FIG. 3).

(6) Then, the surface of silicon substrate 31 was thermally oxidized toa thickness of about 30 nm, for example, in a dry oxidative atmosphereat 900° to 1,000° C. to form a heat (or thermal)-oxidized film 35 on theinside wall of the groove (110 in FIG. 3).

(7) An isolation film such as a silicon oxide film, etc. was depositedthereon by chemical vapor deposition (CVD), sputtering etc. to embed (orbury) the isolation film in the groove (the isolation film will behereinafter referred to as embedding isolation film 36). The siliconoxide film, etc. deposited by chemical vapor deposition, sputtering,etc. are usually porous films, and thus after the deposition ofembedding isolation film 36 silicon substrate 31 may be annealed atabout 1,000° C. or oxidized in an oxidative atmosphere at about 1,000°C. to make the film compact (111 in FIG. 3)

(8) Embedding isolation film 36 was etched back by chemical mechanicalpolishing (CMP) or dry etching, where silicon nitride film 42 used as ananti-oxidation film served as an etching stopper to prevent siliconsubstrate 31 below silicon nitride film 42 from etching (112 in FIG. 3).

(9) Silicon nitride film 42 and pad oxide film 32 were removed, therebythe embedded groove structure was completed (113 in FIG. 3). Then, asemiconductor device was fabricated through necessary mountingprocedures for producing a transistor structure, for example, byformation of gate oxide films and gate electrodes, doping withimpurities, formation of wiring, interlayer insulating films, etc.formation of a surface protective film, etc.

Working and effects of the first embodiment of the present inventionwill be explained below, referring to FIG. 4 and FIGS. 5A and 5B.

Distinction of the first embodiment of the present invention from theprior art is that the extent of recessing pad oxide film 32 in theforegoing step (5) is limited. FIG. 4 shows results of analyzing changesin radius of curvature of the silicon substrate 31 at the groove upperedge by changing the extent of recessing pad oxide film 32, where theextent of recessing pad oxide film 32 is given on the axis of abscissaand the radius at curvature of silicon substrate at the groove upperedge on the exist of ordinate. As is evident from FIG. 4, the radius ofcurvature of the substrate at the groove upper edge increases withincreasing extent of recessing pad oxide film 32 from zero, reachesabout 25 nm with a recessing extent of 5 nm and further increases toabout 35 nm with a recess extent of 20 nm. However, when the recessingextent is increased beyond 40 nm, a step is formed on the upper side ofthe substrate at the groove upper edge, reducing the radius ofcurvature, for example, to 25 nm with a recessing extent of 60 nm.

It can be presumed that the dependency of the radius of curvature uponthe extent of recessing the pad oxide film is due to the followinggrounds;

The oxide film starts to grow during the groove oxidation, whileundergoing approximately 2-fold volumic expansion between siliconnitride film 42 and silicon substrate 31 (FIGS. 5A and 5B). When theextent of recessing pad oxide film 32 is zero, edge of silicon nitridefilm 42 is pushed upwards by the volumic expansion, deforming thesilicon nitride film into a upwardly warped concave shape. Acounterforce develops due to the warping deformation of silicon nitridefilm 42, resulting in development of compression stress both in theoxide film (including part of pad oxide film 32) below silicon nitridefilm 42 and in the silicon substrate (FIG. 5A). Once the compressionstress develops, diffusion of oxidative seeds, that is, progress ofoxidation reaction, is suppressed, so that the rate of oxidation isconsiderably lowered at the groove upper edge. On the groove inside wallon the other hand, the growth direction (direction normal to the insidewall surface) of the oxide film is free from any restriction, that is,there is no inhibiting factor against the volumic expansion of thegrowing oxide film, and thus oxidation can process on the inside wallsurface without any restriction in contrast to the oxidation of thegroove upper edge. Thus, the substrate shape is sharpened at the grooveupper edge of silicon substrate 31 with progress of oxidation, as shownby dotted lines in FIG. 5A.

When pad oxide film 32 is recessed, an exposed region of siliconsubstrate 31 at the groove upper edge and an unexposed region thereofare formed (FIG. 5B). In the exposed region, the growing oxide film isnot in contact with upper layer silicon nitride film 42 at the initialstage of oxidation and thus no compression stress due to the warpingdeformation of silicon nitride film 42, as explained above, referring toFIG. 5A, develops substantially, and thus oxidation can proceed withoutany restriction. Furthermore, silicon substrate 31 is in two-sidecontact (i.e. in two oxygen supply directions) at the groove upper edge,and thus oxidation can proceed rapidly, resulting in rounding the grooveupper edge, that is, increasing the radius of curvature.

In the unexposed region of silicon substrate 31, on the other hand,diffusion of oxidative seeds is inhibited by the presence of pad oxidefilm 32, that is, the oxidation is inhibited. Thus, a step is formed onthe silicon substrate around the edge of pad oxide film 32, because of adifference in the rate of oxidation, as shown in FIG. 4. When the extentof recessing pad oxide film 32 is not more than 40 nm, the step is notformed, because of an approach to the readily oxidizable groove upperedge part (in two oxygen supply directions). Thus the radius ofcurvature is as large as 35 nm. On the other hand, when the recessingextent is more than 40 nm, a step is formed because of remoteness fromthe groove upper edge part, resulting in decreasing the radius ofcurvature. It should be noted that, when oxidation is further continuedin the step (6), the oxide film growing on the exposed part will bebrought into contact with the silicon nitride film, followed by rapiddevelopment of a compression stress, as explained above. That is, theradius of curvature so far attained will be again decreased.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to remove the edges), followed byoxidation in the grooves.

In the first embodiment of the present invention, no step is formed anymore on the substrate around the upper edge of groove isolationstructure and a much larger radius of curvature than 3 nm can beobtained by restricting an extent of recessing the pad oxide film to arange of 5 to 40 nm, and thus an increase in transistor leakage currentor a decrease in gate breakdown voltage due to the field concentrationaround the edge of gate electrode film can be effectively prevented andalso the transistor electric reliability can be effectively improved.The shoulder edge of the groove can be more preferably rounded byproviding an undercut, as shown in FIG. 34, before trenching the groove.

EXAMPLE 2

Steps of producing a groove isolation structure of a semiconductordevice according to a second embodiment of the present invention will beexplained below, referring to FIGS. 2A to 2I and FIG. 6.

Process for producing an embedded groove structure of a semiconductordevice according to the second embodiment of the present invention (flowchart) shown in FIG. 6 is a modification of step (6) of the processaccording to the first embodiment of the present invention. The embeddedgroove structure of the second embodiment is not largely different instructure, etc. from that of the first embodiment, and thus the steps ofthe second embodiment will be explained below, referring to the flowchart of FIG. 6, using the cross-sectional structural elevation views ofthe semiconductor device shown in FIGS. 2A to 2I.

(1) The surface of silicon substrate 31 was thermally oxidized to form apad oxide film 32 having a thickness of about 10 nm (201 and 202 in FIG.6).

(2) Silicon nitride film 42 was deposited on pad oxide film 32 to athickness of about 200 nm, and used as an anti-oxidation film whenelement isolation, thermally oxidized film 35 was formed (203 in FIG.6).

(3) Photoresist 43 was formed on silicon nitride film 42 (204 in FIG.6).

(4) Photoresist 43 at a desired position was removed by an ordinarylight exposure procedure, and then parts of silicon nitride film 42, padoxide film 32 and silicon substrate 31 were removed by etching, and ashallow groove was trenched at a predetermined angle of the inside wallof the groove to the surface of silicon substrate 31 (for example, at anangle of 95° to 110° as shown by A in FIG. 2D) (205 to 207 in FIG. 6).

(5) Photoresist 43 was removed and then pad oxide film 32 was recessedin an extent of 5 to 40 nm by etching (208 and 209 in FIG. 6).

(6) The groove trenched on silicon substrate 31 was thermally oxidizedto a depth of about 30 nm in an oxidative atmosphere of H₂/O₂ gasmixture in a gas flow rate ratio of H₂/O₂ (O<r≦0.5) to form an elementisolation, thermally oxidized film 35 (210 in FIG. 6).

(7) An isolation film such as a silicon oxide film, etc. was depositedthereon by chemical vapor deposition (CVD), sputtering, etc. to embedthe isolation film in the groove (the isolation film will be hereinafterreferred to as embedding isolation film 36). The silicon oxide film,etc. deposited by chemical vapor deposition, sputtering, etc. areusually porous films and thus after the deposition of embeddingisolation film 36 silicon substrate 31 may be annealed at about 1,000°C. or oxidized in an oxidative atmosphere at about 1,000° C. to make thefilm compact (211 in FIG. 6).

(8) Embedding isolation film 36 was etched back by chemical mechanicalpolishing (CMP) or dry etching, where silicon nitride film 42 used as ananti-oxidation film served as an etching stopper to prevent siliconsubstrate 31 below silicon nitride film 42 from etching (212 in FIG. 6).

(9) Silicon nitride film 42 and pad oxide film 32 were removed, wherebythe embedded groove structure was completed (213 in FIG. 6). Then, asemiconductor device was fabricated through necessary mountingprocedures for producing a transistor structure, for example, byformation of gate oxide films and gate electrodes, doping withimpurities, formation of wirings, interlayer insulating films, etc.,formation of a surface protective film, etc.

Working and effects of the second embodiment of the present inventionwill be explained below, referring to FIG. 7.

A gas flow rate ratio of H₂/O₂ of the oxidative atmosphere can bechanged in a range of 0<r≦2, but when r reaches 2 the reaction proceedsexplosively. From the viewpoint of safety, the upper limit to r will besubstantially about 1.8. When the oxidation temperature is presumedconstant within the above-mentioned range of gas flow rate ratio, therate of oxidation increases with increasing gas flow rate ratio, whereasthe rate of oxidation decreases with decreasing gas flow rate ratio.Thus, an effect of the rate of oxidation upon the shape of upper edge ofthe groove of a semiconductor substrate was analyzed. The results areshown in FIG. 7, where a gas flow rate ratio of H₂/O₂ is shown on theaxis of abscissa and a radius of curvature at the upper edge of thegroove of a semiconductor substrate is shown on the axis of ordinate. Asis evident from FIG. 7, the resulting radius of curvature drasticallydecreases with increasing gas flow rate ratio of hydrogen (H₂) in theoxidative atmosphere. When a gas flow rate ratio r reaches 0.5, theradius of curvature is decreased to about 3 nm. When the gas flow rateratio is made higher, the radius of curvature further decreases, thoughlittle by little.

Grounds for such phenomena can be explained as follows:

Oxidation develops a strain (stress) around the boundary between thesilicon substrate and the silicon oxide film, as already mentionedabove. On the other hand, the silicon oxide film shows a remarkableviscous behavior at a high temperature (900° C. or higher), and thus thedeveloped stress is lessened at a high temperature with time. When thethickness of the oxide film is presumed constant, the time required forlessening the developed stress will be shorter with increasing rate ofoxidation (larger gas flow rate ratio of H₂/O₂), though the developedstrain (stress) value is constant. Consequently, the residual stresswill be increased. In case of lower rate of oxidation (smaller gas floware ratio of H₂/O₂), the viscous effect of silicon oxide film can bebrought about, so that the stress lessening proceeds relatively ascompared under the conditions of constant oxide film thickness. Thehigher the stress induced by the oxidation, the more inhibited theoxidation in the region around the developed stress. Thus, the region ofsilicon substrate around the upper edge of the groove is astress-concentrated site due to the growth of oxide film on thesubstrate upper side and the groove inside, and when the residual stressbecomes higher, the oxidation around the stress concentrated site willbe inhibited, so that the upper edge of the groove in silicon substratewill be sharpened. That is, oxidation of the semiconductor substratearound the upper edge of the groove can proceed in a low stress state bymaking a gas flow rate ratio of H₂/O₂ lower, so that the rounding ofsilicon substrate 31 can be attained around the upper edge of thegroove.

From the foregoing grounds, the radius of curvature of the substratearound the upper edge of the groove in the groove isolation structurecan be made much larger than 3 nm according to the second embodiment ofthe present invention. Furthermore, the extent of recessing the padoxide film is set in a range of 5 to 40 nm as given in the firstembodiment of the present invention, the step development on the uppersurface of the substrate at the upper edge of the groove can beprevented. That is, an increase in transistor leakage current or adecrease in gate breakdown voltage due to the field concentration aroundthe edge of gate electrode film can be effectively prevented and alsothe transistor electric reliability can be effectively improved. Theshoulder edge of the groove can be more preferably rounded by providingan undercut, as shown in FIG. 34, before trenching the groove.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 3

Steps of producing an embedded groove structure of a semiconductordevice according to a third embodiment of the present invention will beexplained below, referring to FIGS. 2A to 2I and FIG. 8.

Process for producing an embedded groove structure of a semiconductordevice according to the third embodiment of the present invention (flowchart) shown in FIG. 8 is a modification of step (6) of the processaccording to the first embodiment of the present invention. The embeddedgroove structure of the third embodiment is not largely different instructure, etc. from that of the first embodiment, and thus the steps ofthe third embodiment will be explained below, referring to the flowchart of FIG. 8, using the cross-sectional structural elevation views ofthe semiconductor device shown in FIGS. 2A to 2I.

(1) The surface of silicon substrate 31 was thermally oxidized to form apad oxide film 32 having a thickness of about 10 nm (301 and 302 in FIG.8)

(2) Silicon nitride film 42 was deposited on pad oxide film 32 to athickness of about 200 nm, and used as an anti-oxidation (film whenelement isolation, thermally oxidized film 35 was formed (303 in FIG.8).

(3) Photoresist 43 was formed on silicon nitride film 42 (304 in FIG.5).

(4) Photoresist film 43 at a desired position was removed by an ordinarylight exposure procedure, and then parts of silicon nitride film 42, padoxide film 32 and silicon substrate 31 were removed by etching, ashallow groove was trenched at a predetermined angle of inside wall ofthe groove to the surface of silicon substrate 31 (for example, at anangle of 95° to 110° as shown by A in FIG. 2D) (305 to 307 in FIG. 8).

(5) Photoresist 43 was removed and then pad oxide film 32 was recessedin an extent of 5 to 40 nm by etching (308 and 309 in FIG. 8).

(6) The groove trenched on silicon substrate 31 was thermally oxidizedin an oxidative atmosphere of H₂/O₂ gas mixture in a gas flow rate ratior of H₂/O₂ (o<r≦0.5) in the range wherein the recess space formed up tothe edge of the recesses pad oxide film was filled (310 in FIG. 8).

(7) An isolation film such as a silicon oxide film, etc. was depositedthereon by chemical vapor deposition (CVD), sputtering, etc. to embedthe isolation film in the groove (the isolation film will be hereinafterreferred to as embedding isolation film 36). The silicon oxide film,etc., deposited by chemical vapor deposition, sputtering, etc. areusually porous films and thus after the deposition of embeddingisolation film 36 silicon substrate 31 may be annealed at about 1,000°C. or oxidized in an oxidative atmosphere at about 1,000° C. to make thefilm compact (311 in FIG. 8).

(8) Embedding isolation film 36 was etched back by chemical mechanicalpolishing (CMP) or dry etching, where silicon nitride film 42 used as ananti-oxidation film served as an etching stopper to prevent siliconsubstrate 31 below silicon nitride film 42 from etching (312 in FIG. 8)

(9) Silicon nitride film 42 and pad oxide film 32 were removed, wherebythe embedded groove structure was completed (313 in FIG. 8). Then, asemiconductor device was fabricated through necessary mountingprocedures for producing a transistor structure, for example, byformation of gate oxide films and gate electrodes, doping withimpurities, formation of wirings, interlayer insulating film, etc.,formation of a surface protective film, etc.

Working and effects of the third embodiment of the present inventionwill be explained below, referring to FIGS. 2A to 2I.

As explained already in the first embodiment of the present invention(FIG. 4), silicon nitride film 42 undergoes upward warping deformationwhen the recess space formed up to the edge of the pad oxide film isfully filled by oxidation, and a compression stress develops on padoxide film 32 below silicon nitride film 43 and silicon substrate 31 bya compression force due to the bending of film 43, so that the oxidationis inhibited by the stress, sharpening the silicon substrate around theupper edge of the groove. However, when the oxidation is carried outjust before the recess space formed up to the edge of pad oxide film 32is fully filled, no compression stress due to the warping deformationdevelops any more, so that the oxidation smoothly proceeds at the uppercorner end of silicon substrate 31, rounding silicon substrate 31 aroundthe upper end of the groove. Furthermore, the extent of recessing thepad oxide film is limited to a range of 5 to 40 nm, as given in thefirst embodiment of the present invention, development of a step on theupper surface of the silicon substrate at the upper edge of the groovecan be prevented.

For the foregoing grounds, the radius of curvature of the substratearound the upper edge of the groove in the groove isolation structurecan be made much larger than 3 nm according to the third embodiment ofthe present invention. Furthermore, the step development on the uppersurface of the substrate at the upper edge of the groove can beprevented, so that an increase in transistor leakage current or adecrease in gate breakdown voltage due to the field concentration aroundthe end of gate electrode film can be effectively prevented and also thetransistor electric reliability can be effectively improved. Theshoulder edge of the groove can be more preferably rounded by providingan undercut, as shown in FIG. 34, before trenching the groove.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper end portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 4

Embedded groove structure of a semiconductor device according to afourth embodiment of the present invention and steps of producing theembedded groove structure will be explained below, referring to FIGS. 2Ato 2I and FIG. 9.

FIGS. 2A to 2I are cross-sectional structural elevation views of asemiconductor device according to the fourth embodiment of the presentinvention and FIG. 9 is a flow chart showing outlines of steps ofproducing the present semiconductor device. Steps of producing thepresent semiconductor device will be explained below along the flowchart of FIG. 9, referring to FIGS. 2A to 2I.

(1) The surface of silicon substrate 31 was thermally oxidized to form apad oxide film 32 having a thickness of 5 to 50 nm (401 and 402 in FIG.9).

(2) Silicon nitride film 42 was deposited on pad oxide film 32 to athickness of 10 to 300 nm, and used as an anti-oxidation film whenelement isolation, thermally oxidized film 35 is formed (403 in FIG. 9).

(3) Photoresist 43 was formed on silicon nitride film (404 in FIG. 9).

(4) Photoresist film 43 at a desired position was removed by an ordinarylight exposure procedure, and then parts of silicon nitride film 42, padoxide film 32 and silicon substrate 31 were removed by etching, and ashallow groove was trenched at a predetermined angle of inside wall ofthe groove to the surface of silicon substrate 31 (for example, at anangle of 95° to 110° as shown by A in FIG. 2D) (405 to 407 in FIG. 9).

(5) Photoresist 43 was removed and then pad oxide film 32 was recessedin an extent of 5 to 40 nm by etching (408 and 409 in FIG. 9).

(6) Then, silicon substrate 31 was thermally oxidized at an oxidationtemperature of 900° to 1,000° C. in an oxidative atmosphere of H₂/O₂ ofnot more than 1 ppm, to form thermally oxidized film 35 in the rangewherein the recess space formed up to the edge of the recessed pad oxidefilm is filled with the thermally oxidized film (410 in FIG. 9).

(7) An isolation film such as a silicon oxide film, etc. was depositedthereon by chemical vapor deposition (CVD), sputtering, etc. to embedthe isolation film in the groove (the isolation film will be hereinafterreferred to as embedding isolation film 36). The silicon oxide film,etc. deposited by chemical vapor deposition, sputtering, etc. areusually porous films and thus after the deposition of embeddingisolation film 36 silicon substrate 31 may be annealed at about 1,000°C. or oxidized in an oxidative atmosphere at about 1,000° C. to make thefilm compact (411 in FIG. 9).

(8) Embedding isolation film 36 was etched back by chemical mechanicalpolishing (CMP) or dry etching, where silicon nitride film 42 used as ananti-oxidation film served as an etching stopper to prevent siliconsubstrate 31 below silicon nitride film 42 from etching (412 in FIG. 9).

(9) Silicon nitride film 42 and pad oxide film 32 were removed, wherebythe embedded groove structure was completed (413 in FIG. 9). Then, asemiconductor device was fabricated through necessary mountingprocedures for producing a transistor structure, for example, byformation of gate oxide films and gate electrodes, doping withimpurities, formation of wirings, interlayer insulating films, etc., andformation of a surface protective film, etc. In the groove isolationstructure of the semiconductor device according to the fourth embodimentof the present invention, the substrate has no step on the uppersurface, and a nonotonously convexed shape around the upper edge of thegroove, the oxide film thickness is in a range of 5 to 70 nm at theinside wall of the groove at the intermediate level of the grooveisolation structure and the radius of curvature at the upper corner edgeof semiconductor substrate is in a range of 3 to 35 nm.

Working and effects of the fourth embodiment of the present inventionwill be explained below, referring to FIG. 10.

FIG. 10 shows results of simulation of relations between the oxidizedamount (thickness) of the element isolation, thermally oxidized film atthe inside wall of the groove at the intermediate level and the radiusof curvature at the upper corner edge of the substrate according to thefourth embodiment of the present invention, where “a” indicates athickness of pad oxide film. As is evident from FIG. 10, the radius ofcurvature R at the upper corner edge of silicon substrate increases withincreasing oxidized amount of inside wall of the groove, and reaches amaximum value. The maximum value depends upon the thickness a of padoxide film, and increases with increasing thickness a, but reaches aconstant value (about 35 nm) above a thickness a of 10 nm or more. Thereason why the radius of curvature takes a maximum value is that theradius of curvature increase with progress of groove oxidation, and therecess space formed up to the edge of the recessed pad oxide film isgradually filled by the oxidation, resulting in development of upwardwarping deformation of the silicon nitride film (development of acompression stress on the silicon substrate and oxide film) withintrusion of oxidation therein, as shown in FIG. 5A and consequentinhibition of oxidation by the compression stress, making the radius ofcurvature smaller. Further, with an increase of oxidation amount stressin the thermal oxide film at the upper edge portions of groove increasesprobably due to inhibition of the oxidation.

It has been found by experiments that the radius of curvature R gives noadverse effect on the transistor characteristics, so far as it is about3 nm or more. The oxidized amount on the inside wall of the groove is 5nm or more, which can ensure the necessary radius of curvature, as givenin FIG. 10. Even by oxidation over an oxidized amount of 30 nm theradius of curvature no more increases. Thus, to maximize the radius ofcurvature, it is preferable to make the thickness of pad oxide film 10nm or more and the oxidized amount of groove inside wall 30 nm or more.

Furthermore, no step is developed on the upper surface of the substrateat the upper edge of groove, because the extent of recessing the padoxide film is set in a range of 5 to 40 nm according to the fourthembodiment of the present invention. Thus, the substrate at the upperedge of the groove can have a monotonously convexed surface. Theshoulder edge of the groove can be more preferably rounded by providingan undercut, as shown in FIG. 34, before trenching the groove.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

In the fourth embodiment of the present invention, the radius ofcurvature of the substrate around the upper edge of the groove can bemade as large as about 35 nm, and the substrate has no step on the uppersurface at the upper edge of the groove, and thus an increase intransistor leakage current or gate breakdown voltage due to the fieldconcentration around the end of gate electrode film can be effectivelyprevented and also the transistor electric reliability can beeffectively improved.

As described above, the present invention can provide a semiconductordevice having a groove isolation structure without deterioration of gatebreakdown voltage of transistors, and also a process for producing thesame.

EXAMPLE 5

A process for producing a complementary MISFET (CMOSFET) according to afurther embodiment of the present invention will be explained below,referring to FIGS. 11 to 32.

As shown in FIG. 11, for example, semiconductor substrate 1 of p-typesingle crystal silicon having a resistivity of about 1 to 10 Ωcm wasthermally oxidized at a temperature of 800° to 850° C. to form a siliconoxide film (pad oxide film) 2 destined to stress lessening andprotection of an active region on the principal side (or surface)thereof, and then silicon nitride film 3 was deposited on silicon oxidefilm 2 by CVD.

Then, as shown in FIG. 12, silicon nitride film 3 and silicon oxide film2 in an element isolation region were removed by etching, using aphotoresist as a mask, and then, as shown in FIG. 13, groove 4 a wastrenched to a depth of 350 to 400 nm on semiconductor substrate 1 in theelement isolation zone by etching, using silicon nitride film 3 as amask. In that case, the shoulder edge of the groove could be morepreferably rounded by providing an undercut, as shown in FIG. 34, beforetrenching groove 4 a. Inside wall of groove 4 a was tapered, forexample, at angles θ₁ and θ₂ of 85° or less at the lower and uppercorner ends of the substrate, respectively, by adjusting a gascomposition for etching semiconductor substrate 1. By taping the insidewall of groove 4 a, an isolation film can be easily embedded in groove 4a.

Groove 4 a could be also trenched by successively etching siliconnitride film 3, silicon oxide film 2 and semiconductor substrate 1residing in the element isolation region, using the photoresist as amask. When semiconductor substrate 1 was etched, using the photoresistas a mask, a decrease in the thickness of silicon nitride film 3 servingas a mask for heat oxidation could be prevented. That is, the initialthickness of silicon nitride film 3 could be made smaller.

Then, the inside of groove 4 a was wet-washed to remove etchingresidues, and then, as shown in FIG. 14 and FIG. 15, which is anenlarged view of the essential part of FIG. 14, silicon oxide filmexposed to the inside wall of groove 4 a was removed by a hydrofluoricacid-based etching solution to recess the silicon oxide film towards theactive region. The extend d of recessing silicon oxide film 2 by theetching was in a range of 5 to 40 nm.

By recessing silicon oxide film 2 exposed to the inside wall of groove 4a in the above-mentioned extent range, rounding of the shoulder edge ofgroove 4 a could be made easier when silicon oxide film 5 was to beformed on the inside wall of groove 4 a in the successive heat oxidationstep. When the extent of recessing silicon oxide film 2 was too large,the step is undesirably formed at the shoulder edge. Therefore, it wasimportant to control the extent d of recessing silicon oxide film 2 fromthe inside wall of groove 4 a to a range of 5 to 40 nm.

Then, as shown in FIG. 16 and FIG. 17, which is an enlarged view of theessential part of FIG. 16, semiconductor substrate 1 was thermallyoxidized, for example, at 950° C. to form silicon oxide film 5 on theinside wall of groove 4 a. Silicon oxide film 5 was formed to remedyetching damages on the inside wall of groove 4 a and also to lessen astress on silicon oxide film 6 to be embedded in groove 4 a in asuccessive step. Thickness Tr of silicon oxide film 5 was made largerthan thickness Tp of silicon oxide film (pad oxide film) 2 but threetimes as large as Tp, that is, in a range of Tp<Tr≦3Tp, by controllingthe oxidation time, thereby rounding the shoulder edge of groove 4 a.When the oxidation temperature of semiconductor substrate 1 was below800° C., silicon oxide film 5 was hard to grow, whereas above 1,000° C.,a wafer of particularly large diameter was readily susceptible ofdislocation. It was found that the oxidation was carried out in atemperature range of 800° to 1,000° C.

Then, as shown in FIG. 19, silicon oxide film 7 was deposited on theprincipal side (or surface) of semiconductor substrate 1 by CVD to embedsilicon oxide film 7 in groove 4 a. Silicon oxide film 7 was made from asilicon oxide material having a good flowability as in a silicon oxidefilm formed from, for example, ozone (O₃) and tetraethoxysilane((C₂H₅)₄Si). Prior to the step of depositing silicon oxide film 7,silicon nitride film 6 could be thinly deposited on the inside wall ofgroove by CVD, as shown in FIG. 18, where silicon nitride film 6 servedto suppress growth of silicon oxide film 5 on the inside wall of groove4 a towards the active region when sintering silicon oxide film 7embedded in groove 4 a in a successive step and thus to suppress such aninconvenience as formation of leak path due to development of a stresson semiconductor substrate 1 in the active region by silicon oxide film5.

Then, semiconductor substrate 1 was wet oxidized at a temperature of notmore than 1,000° C., for example, 850° C., to sinter silicon oxide film7 embedded in groove 4 a, thereby improving the quality of silicon oxidefilm 7.

Then, as shown in FIG. 20, silicon oxide film 7 was polished, forexample, by chemical mechanical polishing (CMP) to flatten the surface.Polishing was carried out with silicon nitride film 3 covering theactive region as a stopper to leave silicon oxide film 7 only in groove4 a, thereby an element isolation groove 4 embedded with silicon oxidefilm 7 was completed. Then, as shown in FIG. 21, silicon nitride film 3covering the active region was removed by an etching solution such ashot phosphoric acid, etc.

Sintering of silicon oxide film 7 embedded in groove 4 a could becarried out after silicon oxide film 7 was polished by CMP to leavesilicon oxide film 7 only in groove 4 a. In that case, the thickness ofsilicon oxide film 7 to be sintered was smaller than that when thesintering was carried out before polishing silicon oxide film 7, andthus sintering time could be shortened.

When the size of groove 4 a was very small, voids could be sometimesformed in silicon oxide film 7, when embedded in groove 4 a during thestep of depositing silicon oxide film 7 on semiconductor substrate 1. Toavoid such formation of voids, silicon oxide film 7 having a thicknesslarge enough to prevent formation of voids in the film was deposited, asshown in FIG. 22, and then polycrystalline silicon film 8 was depositedthereon by CVD, as shown in FIG. 23, thereby completely embedding adouble layer of silicon oxide film 7 and polycrystalline silicon film 8in groove 4 a. Prior to the step of depositing silicon oxide film 7,silicon nitride film 6 could be thinly deposited on the inside wall ofgroove 4 a and silicon nitride film 3 by CVD to suppress growth ofsilicon oxide film 5 towards the active region during the sintering.

Then, as shown in FIG. 23, semiconductor substrate 1 was heat-treated(or annealed) under the above-mentioned conditions to sinter siliconoxide film 7. In that case, polycrystalline silicon film 8 on siliconoxide film 7 was thermally oxidized to and converted to silicon oxidefilm 8 a as shown in FIG. 24.

Then, as shown in FIG. 25, silicon oxide film 8 a and silicon oxide film7 were polished to obtain an element isolation groove 4 free from voids.

A complementary MISFET was formed in the active region of semiconductorsubstrate 1 whose circumference was confined by element isolation groove4 in the following manner:

At first, silicon oxide film (pad oxide film) 2 remaining on the surfaceof the active region was removed by a hydrofluoric acid solution, etc.and then, as shown in FIG. 26, semiconductor substrate 1 was thermallyoxidized at a temperature of 800° to 850° C. to form a clean gate oxidefilm 9 on the surface of semiconductor substrate 1. In that case, theshoulder edge of element isolation groove 4 was rounded, therebypreventing such an inconvenience as thinning of gate oxide film 9 at theshoulder edge.

Then, as shown in FIG. 27, n-type impurities such as phosphorus (P),etc. were ion-implanted onto part of semiconductor substrate 1 andp-type impurities such as boron (B), etc. were ion-implanted on theother part thereof, and then semiconductor substrate 1 was heat-treatedat a temperature of not more than 1,000° C., for example, 950° C. toconduct extended diffusion of the two kinds of impurities, therebyforming p-type well 10 in n-channel type MISFET-forming region andn-type well 11 on p-channel type MISFET-forming region. Gate oxide film9 could be formed on the surfaces of p-type well 10 and n-type well 11,after their respective formation.

Then, as shown in FIG. 28, gate electrode 12 for the n-channel typeMISFET was formed on p-type well 10 and gate electrode 12 for p-channeltype MISFET was formed on n-type well 11. To form gate electrode 12, forexample, a p-doped polycrystalline silicon film, a tungsten (W) silicidefilm and a cap isolation film 13 were deposited successively onsemiconductor substrate 1 by CVD, and then these films were patterned byetching, using a photoresist as a mask, thereby obtaining gate electrode12. Cap isolation film 13 was made from a silicon oxide film or asilicon nitride film.

Then, as shown in FIG. 29, p-type well 10 was ion-implanted with n-typeimpurities such as P, etc. to form n-type semiconductor region (source,drain) 14 of n-channel type MISFET, and n-type well 11 was ion-implantedwith p-type impurities such as B (boron) etc. to form p-typesemiconductor region (source, drain) 15 of p-channel type MISFET,thereby obtaining an n-channel type MISFETQ_(n) and p-channel typeMISFETQ_(p).

Then, as shown in FIG. 30, side wall spacer 16 was formed on the sidewall of gate electrode 12. Side wall spacer 16 was formed by depositinga silicon oxide film or a silicon nitride film on semiconductorsubstrate 1 by CVD and patterning the film by anisotropic etching.

Then, as shown in FIG. 31, silicon oxide film 17 was deposited onsemiconductor substrate 1 by CVD, and then, as shown in FIG. 32, contactholes 18 were formed through silicon oxide film 17 on n-typesemiconductor region (source, drain) 14 of n-channel type MISFETQ_(n)and p-type semiconductor region (source, drain) of p-channel typeMISFETQ_(n), respectively, and an aluminum (Al) alloy film deposited onsilicon oxide film 17 by sputtering was patterned to form wiring 19.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edge), followedby oxidation in the groove.

EXAMPLE 6

A process for forming element isolation groove 4 according to a stillfurther embodiment of the present invention will be explained below,referring to FIGS. 33 to 36.

At first, as shown in FIG. 33, semiconductor substrate 1 was thermallyoxidized at a temperature of 800° to 850° C. to form silicon oxide film(pad oxide film) 2 on the principal side (or surface) of semiconductorsubstrate 1, and then silicon nitride film 3 was deposited on siliconoxide film 2 by CVD. Then, silicon nitride film 3 and silicon oxide film2 in an element isolation region were removed by etching, using aphotoresist as a mask.

Then, as shown in FIG. 34, the surface of semiconductor substrate 1 inthe element isolation region was isotropically and shallowly etched toform an undercut a on semiconductor substrate 1 at the edges in theelement isolation region.

Then, as shown in FIG. 35, semiconductor substrate 1 in the elementisolation region was anisotropically etched by changing an etching gascomposition, etc. to form groove 4 a on semiconductor substrate 1 in theelement isolation region. Then, as shown in FIG. 36, semiconductorsubstrate 1 was thermally oxidized, for example, at 950° C. to formsilicon oxide film 5 on the inside wall of groove 4 a and round theshoulder edged groove 4 a at the same time. The successive steps werecarried out in the same manner as in Example 5.

According to this embodiment, undercut a was formed at the shoulder edgeof groove 4 a prior to the step of forming silicon oxide film 5 on theinside wall of groove 4 a, whereby the shoulder edge of groove 4 a couldbe rounded. Formation of undercut a at the shoulder edge of groove 4 aaccording to this embodiment could be also carried out together withrecessing of silicon oxide film 2 exposed to the inside wall of groove 4a towards the active region according to Example 5.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 7

A process for forming element isolation groove 4 according to a furtherembodiment of the present invention will be explained below, referringto FIGS. 37 to 44.

At first, as shown in FIG. 37, silicon oxide film 5 was formed on theinside wall of groove 4 a and the shoulder edges of groove 4 a wererounded at the same time in the same manner as in Examples 1 to 3, andthen, as shown in FIG. 38, silicon nitride film 6 was thinly depositedon semiconductor substrate 1 by CVD. Silicon nitride film 6 was formedto suppress growth of silicon oxide film 5 on the inside wall of groove4 a towards the active region during sintering of silicon oxide film 7embedded in groove 4 a in a successive step.

Then, as shown in FIG. 39, silicon oxide film 7 was deposited onsemiconductor substrate 1 by CVD to embed silicon oxide film 7 in groove4 a, and then semiconductor substrate 1 was wet oxidized or annealed inthe same temperature conditions as described before to sinter siliconoxide film 7 embedded in groove, thereby improving the quality ofsilicon oxide film 7.

Then, as shown in FIG. 40, silicon oxide film 7 was polished by chemicalmechanical polishing to leave silicon oxide film 7 only in groove 4 a,thereby forming an element isolation groove 4. When silicon nitride film3 covering the active region was to be etched with an etching solutionsuch as hot phosphoric acid, etc. silicon nitride film 6 on the insidewall of element isolation groove 4 was etched away at the same time, asshown in FIG. 41, thereby recessing silicon nitride film 6 inwardly intoelement isolation region 4 and forming a recess at the shoulder edge ofelement isolation groove 4. Once such a recess was formed at theshoulder edge of element isolation groove 4, the surface of siliconoxide film 7 embedded in element isolation groove 4 was sometimesfractured to make foreign fragments etching residues were left in therecess when gate electrode materials such as polycrystalline silicon,etc. deposited thereon in a later step were to be etched.

To overcome such an inconvenience as mentioned above, for example, asshown in FIG. 42, after removal of silicon nitride film 3, silicon oxidefilm 7 at the shoulder edge of element isolation groove 4 was reoxidizedat a temperature of 850° to 900° C. to make the film thickness larger,thereby sealing the recess by silicon oxide film 7. To seal the recessby silicon oxide film 7, it was necessary to make an increment of thefilm thickness at least twice as large as the thickness of siliconnitride film 6. When the increment of the film thickness was too large,the active region was narrowed by grown silicon oxide film 5. Thus, anincrement of the film thickness was made twice as large as the thicknessof silicon nitride film 6 or slightly higher than the double thicknessof silicon nitride film 6 by controlling oxidation time.

According to another procedure for preventing formation of a recess atthe shoulder edge of element isolation groove 4, as shown in FIG. 43,silicon oxide film 7 was polished by chemical mechanical polishing toleave silicon oxide film 7 only in groove 4 a, followed by sintering. Bysetting a longer sintering time or a higher sintering temperature, thesurface of silicon nitride film 3 covering the active region and siliconnitride film 6 at the shoulder edge of element isolation groove 4 couldbe oxidized. Then, the oxide film on silicon nitride film 3 was removedby etching and successively silicon nitride film 3 was removed byetching , whereby formation of a recess at the shoulder edge of elementisolation groove 4 could be prevented, as shown in FIG. 44.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 8

A process for forming element isolation groove 4 according to a furtherembodiment of the present invention will be explained below, referringto FIGS. 45 and 46.

At first, as shown in FIG. 45, silicon oxide film 5 was formed on theinside wall of groove 4 a and the shoulder edge of groove 4 a wasrounded at the same time in the same manner as in Examples 1 to 3, andthen, as shown in FIG. 46, the inside wall of groove 4 a was subjectedto soft nitriding to segregate nitrogen in the region near the boundarybetween silicon oxide film 5 formed on the inside wall of groove 4 a andthe side wall of the active region of semiconductor substrate 1, therebyforming silicon nitride layer 20. To carry out a soft nitriding of theinside wall of groove 4 a, semiconductor substrate 1 was heat-treated ina NO (nitrogen oxide) or N₂O (dinitrogen oxide) atmosphere, wherenitrogen released by thermal decomposition of NO or N₂O was segregatedin the region near the boundary between silicon oxide film 5 and theactive region of semiconductor substrate 1, and then silicon nitridelayer 20 was formed by heat treatment.

According to this embodiment of the present invention, silicon nitridelayer 20 was formed in the region near the boundary between siliconoxide film 5 and the active region of semiconductor substrate 1, wherebythe region near the boundary was hard to oxidize during the sintering ofsilicon oxide film 7 later embedded in groove 4 a and thus growth ofsilicon oxide film 5 towards the active region could be suppressed.

According to another procedure for forming silicon nitride layer 20 inthe region near the boundary between silicon oxide film 5 and the activeregion of semiconductor substrate 1, as shown in FIG. 47, silicon oxidefilm 5 was formed on the inside wall of groove 4 a and the shoulder edgeof groove 4 a was rounded in the same manner as in Examples 1 to 3, andthen, as shown in FIG. 48, nitrogen was ion-implanted in the region nearthe boundary between silicon oxide film 5 and the active region ofsemiconductor substrate 1, if necessary, followed by heat treatment.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 9

A process for forming element isolation groove 4 according to a stillfurther embodiment of the present invention will be explained below,referring to FIGS. 49 and 50.

At first, as shown in FIG. 49, groove 4 a was trenched on semiconductorsubstrate 1 in an element isolation region by etching, using siliconnitrogen film 3 as a mask, and then silicon oxide film 2 exposed to theinside wall of groove 4 a was removed with a hydrofluoric acid-basedetching solution to recess silicon oxide film 2 towards the activeregion. Steps up to this stage were the same as in Examples 1 to 3.

Then, as shown in FIG. 50, semiconductor substrate 1 was subjected tosoft nitriding to form silicon nitride film 21 on the inside wall ofgroove 4 a and round the shoulder edge of groove 4 a at the same time.To conduct soft nitriding of semiconductor substrate 1, semiconductorsubstrate 1 was heat-treated in a mixed NO and N₂ atmosphere at atemperature of about 900° C. or in a mixed N₂O and N₂ atmosphere at atemperature of 1,050° C.

According to this embodiment, silicon nitride film 21 was formed on theinside wall of groove 4 a, whereby the region near the above-mentionedboundary was hard to oxidize during the sintering of silicon oxide film7 later embedded in groove 4 a and thus growth of silicon oxide film 5towards the active region could be suppressed.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 10

A process for forming element isolation groove 4 according to a stillfurther embodiment of the present invention will be explained below,referring to FIGS. 51 to 54.

At first, as shown in FIG. 51, groove 4 a was trenched on semiconductorsubstrate 1 in an element isolation region by etching, using siliconnitride film 3 as a mask, and then, as shown in FIG. 52, silicon oxidefilm 2 exposed to the inside wall of groove 4 a was removed by ahydrofluoric acid-based etching solution to recess silicon oxide film 2towards the active region. Steps up to this stage were the same as inExamples 1 to 3.

Then, as shown in FIG. 53, silicon oxide film 7 was deposited onsemiconductor substrate 1 by CVD to embed silicon oxide film 7 in groove4 a. Then, as shown in FIG. 54, semiconductor substrate 1 was wetoxidized or annealed to sinter silicon oxide film 7. At the same time,silicon oxide film 5 was formed on the inside wall of groove 4 a and theshoulder edge of groove 4 a was rounded.

According to this embodiment, sintering of silicon oxide film 7,formation of silicon oxide film 5 on the inside wall of groove 4 a androunding of the shoulder edge of groove 4 a were carried out at the sametime, whereby the process for forming element isolation groove 4 couldbe simplified.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 11

A process for forming element isolation groove 4 according to a stillfurther embodiment of the present invention will be explained below,referring to FIGS. 55 to 58.

At first, as shown in FIG. 55, groove 4 a was trenched on semiconductorsubstrate 1 in an element isolation zone by etching, using siliconnitride film 3 as a mask, and then silicon oxide film 2 exposed to theinside wall of groove 4 a was removed by a hydrofluoric acid-basedetching solution to recess silicon oxide film 2 towards the activeregion. Steps up to this stage were the same as in Examples 1 to 3.

Then, as shown in FIG. 56, silicon oxide film 7 was deposited onsemiconductor substrate 1 by CVD to embed silicon oxide film 7 in groove4 a, and then, as shown in FIG. 57, silicon oxide film 7 on siliconnitride film 3 was removed to leave silicon oxide film 7 only in groove4 a, thereby forming element isolation groove 4 embedded with siliconoxide film 7. Then, as shown in FIG. 58, semiconductor substrate 1 waswet oxidized to sinter silicon oxide film 7. At the same time, siliconoxide film was formed on the inside wall of groove 4 a and the shoulderedge of groove 4 a was rounded.

According to this embodiment, sintering of silicon oxide film 7,formation of silicon oxide film 5 on the inside wall of groove 4 a androunding of the shoulder edge of groove 4 a could be carried out at thesame time, whereby the process for forming element isolation groovecould be simplified.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 12

A process for forming element isolation groove 4 according to a stillfurther embodiment of the present invention will be explained below,referring to FIGS. 59 to 64.

At fist, as shown in FIG. 59, groove 4 a was trenched on semiconductorsubstrate 1 in an element isolation region by etching, using siliconnitride film 3 as a mask, and then silicon oxide film 2 exposed to theinside wall of groove 4 a was removed by a hydrofluoric acid-basedetching solution to recess silicon oxide film 2 towards the activeregion.

Then, as shown in FIG. 60, semiconductor substrate 1 was thermallyoxidized to form silicon oxide film 5 on the inside wall of groove 4 aand round the shoulder edge of groove 4 a at the same time. Steps up tothis stage were the same as in Examples 1 to 3.

Then, as shown in FIG. 61, polycrystalline silicon film 22 was shallowlydeposited on semiconductor substrate 1 by CVD, and then, as shown inFIG. 62, silicon oxide film 7 was deposited on polycrystalline siliconfilm 22 by CVD to embed silicon oxide film 7 in groove 4 a.

Then, as shown in FIG. 63, semiconductor substrate 1 was wet oxidized tosinter silicon oxide film 7 embedded in groove 4 a. At the same time, atleast a portion of polycrystalline silicon film 22 was oxidized andconverted to silicon oxide film 23. Thus, oxidation of the region nearthe boundary between silicon oxide film 5 and the active region ofsemiconductor substrate 1 was suppressed, so that growth of siliconoxide film 5 towards the active region was inhibited. Whenpolycrystalline silicon film 22 was oxidized to silicon oxide film 23,its volume was increased to about twice as large as the original. Thatis, even when voids were formed in silicon oxide film 7 embedded ingroove 4 a, the voids could be effectively constricted by the volumeincrease of silicon oxide film 23.

Then, as shown in FIG. 64, silicon oxide film 7 and silicon oxide film23 on silicon nitride film 3 were removed to leave silicon oxide films 7and 23 only in groove 4 a, thereby forming element isolation groove 4.Sintering of silicon oxide film 7 and oxidation of polycrystallinesilicon film 22 could be also carried out after formation of elementisolation groove 4. Furthermore, an amorphous silicon film could be usedin place of polycrystalline silicon film 22.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before oxidation in the groove. Thus, afterrecessing the pad oxide film, isotropic etching may be conducted at theshoulder edge of the groove (to easily remove the edges), followed byoxidation in the groove.

EXAMPLE 13

A process for forming element isolation groove 4 according to a stillfurther embodiment of the present invention will be explained below,referring to FIGS. 65 and 66.

At first, as shown in FIG. 65, groove 4 a was trenched on semiconductorsubstrate 1 in an element isolation region by etching, using siliconnitride film 3 as a mask, and then silicon oxide film 2 exposed to theinside wall of groove 4 a was removed by a hydrofluoric acid-basedetching solution to recess silicon oxide film 2 towards the activeregion. Steps up to this stage were the same as in Examples 1 to 3.

Then, as shown in FIG. 66, semiconductor substrate 1 was heat-treated ina nitrogen atmosphere to form silicon nitride film 24 on the inside wallof groove 4 a and round the shoulder edge of groove 4 a at the sametime.

According to this embodiment, silicon nitride film 24 was formed on theinside wall of groove 4 a, whereby oxidation of the active region ofsemiconductor substrate 1 could be inhibited during the sintering ofsilicon oxide film 7 later embedded in groove 4 a.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 14

A process for forming element isolation groove 4 according to a stillfurther embodiment of the present invention will be explained below,referring to FIGS. 67 and 68.

At first, as shown in FIG. 67, groove 4 a was trenched on semiconductorsubstrate 1 in an element isolation region by etching, using siliconnitride film 3 as a mask, and then silicon oxide film 2 exposed to theinside wall of groove 4 a was removed by a hydrofluoric acid-basedsolution to recess silicon oxide film 2 towards the active region. Stepsup to this stage were the same as in Examples 1 to 3. Then,semiconductor substrate 1 was thermally oxidized to form thin siliconoxide film 25 on the inside wall of groove 4 a.

Then, as shown in FIG. 68, semiconductor substrate 1 was heat-treated ina nitrogen atmosphere to convert silicon oxide film 25 on the insidewall of groove 4 a to silicon nitride film 26.

According to this embodiment, silicon nitride film 26 was formed on theinside wall of groove 4 a, whereby oxidation of the active region ofsemiconductor substrate 1 could be inhibited during the sintering ofsilicon oxide film 7 later embedded in groove 4 a.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

EXAMPLE 15

A process for forming element isolation groove 4 according to a stillfurther embodiment of the present invention will be explained below,referring to FIGS. 69 and 70.

At first, as shown in FIG. 69, groove 4 a was trenched on semiconductorsubstrate 1 in an element isolation region by etching, using siliconnitride film 3 as a mask, and then silicon oxide film 2 exposed to theinside wall of groove 4 a was removed by a hydrofluoric acid-basedetching solution to recess silicon oxide film 2 towards the activeregion. Steps up to this stage were the same as in Examples 1 to 3.Then, thin polycrystalline silicon film 27 was deposited onsemiconductor substrate 1 by CVD.

Then, as shown in FIG. 70, semiconductor substrate 1 was heat-treated ina nitrogen atmosphere to convert polycrystalline silicon film 27 tosilicon nitride film 28.

According to this embodiment, silicon nitride film 28 was formed on theinside wall of groove 4 a, whereby oxidation of the active region ofsemiconductor substrate 1 could be inhibited during the sintering ofsilicon oxide film 7 later embedded in the groove.

In the foregoing Examples 6 to 15, the shoulder edge of groove 4 a couldbe more preferably rounded by providing an undercut, as shown in FIG.34, before trenching groove 4 a.

It is also possible to further round the shoulder edge of the groove byremoving edge portions of upper edge portions of the groove after therecess of pad oxide film and before the oxidation in the groove. Thus,after recessing the pad oxide film, isotropic etching may be conductedat the shoulder edge of the groove (to easily remove the edges),followed by oxidation in the groove.

In the foregoing, the present invention made by the present inventor hasbeen explained according to specific embodiments of the presentinvention, but the present invention is not limited thereto and can bemodified to various degrees within the scope of the present invention.

INDUSTRIAL APPLICABILITY

According to the present invention, the shape of element isolationgroove of a semiconductor device can be optimized by low temperatureheat treatment at not more than 1,000° C., and the devices can be madefiner with improved electric characteristics thereof.

Furthermore, according to the present invention, an adverse effect of astress in the active region due to sintering of silicon oxide filmembedded in the element isolation groove upon device characteristics canbe reduced. Thus, a semiconductor device of high reliability can beproduced.

What is claimed is:
 1. A process for producing a semiconductor device,which comprises the following steps: (1) a step of forming a pad oxidefilm having a thickness of at least 5 nm on a circuit-forming side of asemiconductor substrate, (2) a step of forming an anti-oxidation film onthe pad oxide film, (3) a step of trenching a groove to a desired depthat a desired position on the circuit-forming side of the semiconductorsubstrate, (4) a step of recessing the pad oxide film to an extent of 5nm to 40 nm from the inside wall of the groove, (5) a step of oxidizingthe inside wall of the groove trenched on the semiconductor surface, (6)a step of embedding an isolation film in the oxidized groove, (7) a stepof removing the embedding isolation film formed on the anti-oxidationfilm, (8) a step of removing the anti-oxidation film formed on thecircuit-forming side of the semiconductor substrate, and (9) a step ofremoving the pad oxide film formed on the circuit-forming side of thesemiconductor substrate.
 2. A process according to claim 1, wherein theinside wall of the groove is oxidized in an oxidative atmosphere ofH₂/O₂ in a flow rate ratio of H₂/O₂ of not more than 0.5.
 3. A processaccording to claim 1, wherein the inside wall of the groove is oxidizedjust before a recess space formed up to the edge of the recessed padoxide film is fully filled by oxidation.
 4. A process according to claim1, wherein the inside wall of the groove is oxidized in an oxidativeatmosphere of H₂/O₂ in a flow rate ratio of H₂/O₂ of not more than 0.5in the range wherein a recess space formed up to the edge of therecessed pad oxide film is filled by oxidation.
 5. A process forproducing a semiconductor device, which comprises the following steps:(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film as a pad oxide film on the surface ofthe semiconductor substrate, then depositing a silicon nitride film asan anti-oxidation film on the first silicon oxide film, and thenselectively etching the silicon nitride film, the first silicon oxidefilm and the semiconductor substrate residing in an element isolationregion while masking an element region, thereby trenching a groove onthe surface of the semiconductor substrate, (b) a step of etching thefirst silicon oxide film exposed to the inside wall of the groove,thereby recessing the first silicon oxide film from the inside wall ofthe groove towards an active region to an extent of 5 to 40 nm, (c) astep of thermally oxidizing the semiconductor substrate, thereby forminga second silicon oxide film on the inside wall of the groove just beforefully filling the second silicon oxide film in the recess space formedup to the edge of the recessed first silicon oxide film and rounding theshoulder edge of the groove at the same time, (d) a step of depositing athird silicon oxide film on the surface of the semiconductor substrate,thereby embedding the third silicon oxide film in the groove, (e) a stepof heat-treating (or annealing) the semiconductor substrate, therebysintering the third silicon oxide film embedded in the groove, (f) astep of removing the third silicon oxide film on the silicon nitridefilm, while leaving the third silicon oxide film only in the groove,thereby forming an element isolation groove embedded with the thirdsilicon oxide film, and (g) a step of removing the silicon nitride filmon the surface o the active region whose circumference is confined bythe element isolation groove and then forming a semiconductor element inthe active region.
 6. A process according to claim 5, wherein athermally oxidizing temperature for forming the first silicon oxidefilm, a thermally oxidizing temperature for forming the second siliconoxide film and a heat-treating (or annealing) temperature for sinteringthe third silicon oxide film are all not more than 1,000° C.
 7. Aprocess according to claim 5, wherein the thermally oxidizingtemperature for forming the second silicon oxide film is from 800° to1,000° C.
 8. A process according to claim 5, wherein the groove has ataper angle e of not more than 85°.
 9. A process according to claim 5,wherein the inside wall of the groove is subjected to an soft nitridingtreatment after the step (c) but before the step (d), thereby forming asilicon nitride layer in an area near the boundary between the secondsilicon oxide film formed on the inside wall of the groove and theactive region of the semiconductor substrate.
 10. A process according toclaim 5, wherein an area near the boundary between the second siliconoxide film formed on the inside wall of the groove and an elementisolation region of the semiconductor substrate is subjected to nitrogenion implantation after the step (c) but before the step (d), therebyforming a silicon nitride layer in the area near the second siliconoxide film formed on the inside wall of the groove and the elementisolation region of the semiconductor substrate.
 11. A process accordingto claim 5, wherein the third silicon oxide film on the silicon nitridefilm is removed after the step (d), while leaving the third siliconoxide film only in the groove, thereby forming an element isolationgroove embedded with the third silicon oxide film, and thenheat-treating (or annealing) the semiconductor substrate, therebysintering the third silicon oxide film embedded in the groove.
 12. Aprocess according to claim 5, wherein the step (c) is carried out in anitrogen-containing atmosphere, thereby forming a second silicon nitridefilm on the inside wall of the groove and rounding the shoulder edge ofthe groove at the same time.
 13. A process according to claim 5, whereina second silicon nitride film is formed at least on the surface of thesecond silicon oxide film after the step (c) but before the step (d).14. A process for producing a semiconductor device, which comprises thefollowing steps: (a) a step of thermally oxidizing a semiconductorsubstrate, thereby forming a first silicon oxide film on the surface ofthe semiconductor substrate, then depositing a silicon nitride film onthe first silicon oxide film, and then selectively etching the siliconnitride film and the first silicon oxide film residing in an elementisolation region while masking an element region, (b) a step ofisotropically and shallowly etching the semiconductor substrate in theelement isolation region, thereby forming an undercut on thesemiconductor substrate at the edge of the element isolation region, (c)a step of selectively etching the semiconductor substrate in the elementisolation region, thereby trenching a groove on the surface of thesemiconductor substrate, (d) a step of thermally oxidizing thesemiconductor substrate, thereby forming a second silicon oxide film onthe inside wall of the groove and rounding the shoulder edge of thegroove at the same time, (e) a step of depositing a third silicon oxidefilm on the surface of the semiconductor substrate, thereby embeddingthe third silicon oxide film in the groove, (f) a step of heat-treating(or annealing) the semiconductor substrate, thereby sintering the thirdsilicon oxide film embedded in the groove, (g) a step of removing thethird silicon oxide film on the silicon nitride film, while leaving thethird silicon oxide film only in the groove, thereby forming an elementisolation groove embedded with the third silicon oxide film, and (h) astep of removing the silicon nitride film on the surface of an activeregion whose circumference is confined by the element isolation groove,and then forming a semiconductor element in the active region.
 15. Aprocess for producing a semiconductor device, which comprises thefollowing steps: (a) a step of thermally oxidizing a semiconductorsubstrate, thereby forming a first silicon oxide film on the surface ofthe semiconductor substrate, then depositing a first silicon nitridefilm on the first silicon oxide film and then selectively etching thefirst silicon nitride film, the first silicon oxide film and thesemiconductor substrate residing in an element isolation region whilemasking an element region, thereby trenching a groove on the surface ofthe semiconductor substrate, (b) a step of etching the first siliconoxide film exposed to the inside wall of the groove, thereby recessingthe first silicon oxide film from the inside wall of the groove to anextent of 5 to 40 nm towards an active region, (c) a step of thermallyoxidizing the semiconductor device, thereby forming a second siliconoxide film on the inside wall of the groove just before fully fillingthe second silicon oxide film in the recess space formed up to therecessed first silicon oxide film, and rounding the shoulder edge of thegroove at the same time, (d) a step of depositing a second siliconnitride film on the semiconductor substrate including the inside of thegroove by chemical vapor deposition, (e) a step of depositing a thirdsilicon oxide film on the surface of the semiconductor substrate,thereby embedding the third silicon oxide film in the groove, (f) a stepof heat-treating (or annealing) the semiconductor substrate, therebysintering the third silicon oxide film embedded in the groove, (g) astep of removing the third silicon oxide film and the second siliconnitride film on the first silicon nitride film, while leaving the thirdsilicon oxide film and the second silicon nitride film only in thegroove, thereby forming an element isolation groove embedded with thethird silicon oxide film and the second silicon nitride film, (h) a stepof removing the first silicon nitride film on the surface of the activeregion whose circumference is confined by the element isolation grooveby etching, (i) a step of thermally oxidizing the third silicon oxidefilm in the element isolation groove, thereby increasing the thicknessof the film and filling a recess formed by simultaneous removal of thesecond silicon nitride film at the shoulder edge of the elementisolation groove during the removal of the first silicon nitride film byetching, and (j) a step of forming a semiconductor element in the activeregion.
 16. A process for producing a semiconductor device, whichcomprises the following steps: (a) a step of thermally oxidizing asemiconductor substrate, thereby forming a first silicon oxide film onthe surface of the semiconductor substrate, then depositing a firstsilicon nitride film on the first silicon oxide film, and thenselectively etching the first silicon nitride film, the first siliconoxide film and the semiconductor substrate residing in an elementisolation zone while masking an element region, thereby trenching agroove on the surface of the semiconductor substrate, (b) a step ofetching the first silicon oxide film exposed to the inside wall of thegroove, thereby recessing the first silicon oxide film from the insidewall of the groove towards an active region to an extent of 5 to 40 nm,(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groovejust before fully filling the second silicon oxide film in the recessspace formed up to the recessed first silicon oxide film, and roundingthe shoulder edge of the groove at the same time, (d) a step ofdepositing a second silicon nitride film on the semiconductor substrateincluding the inside of the groove by chemical vapor deposition, (e) astep of depositing a third silicon oxide film on the surface of thesemiconductor substrate, thereby embedding the third silicon oxide inthe groove, (f) a step of removing the third silicon oxide film and thesecond silicon nitride film on the first silicon nitride film, whileleaving the third silicon oxide film and the second silicon nitride filmonly in the groove, thereby forming an element isolation groove embeddedwith the third silicon oxide film and the second silicon nitride film,(g) a step of heat-treating (or annealing) the semiconductor substrate,thereby sintering the third silicon oxide film embedded in the grooveand oxidizing the surface of the first silicon nitride film and thesurface of the second silicon nitride film on the shoulder edge of theelement isolation groove, (h) a step of removing the first siliconnitride film on the surface of the active region whose circumference isconfined by the element isolation groove and the oxide film on thesurface of the first silicon nitride film by etching, and (i) a step offorming a semiconductor element in the active region.
 17. A process forproducing a semiconductor device, which comprises the following steps:(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film on the surface of the semiconductorsubstrate, then depositing a silicon nitride film on the first siliconoxide film, and then selectively etching the silicon nitride film, thefirst silicon oxide film and the semiconductor substrate residing in anelement isolation region while masking an element region, therebytrenching a groove on the surface of the semiconductor substrate, (b) astep of etching the first silicon oxide film exposed to the inside wallof the groove, thereby recessing the first silicon oxide film from theinside wall of the groove towards an active region to an extent of 5 to40 nm, (c) a step of depositing a second silicon oxide film on thesurface of the semiconductor substrate, thereby embedding the secondsilicon oxide film in the groove, (d) a step of thermally oxidizing thesemiconductor substrate, thereby sintering the second silicon oxide filmembedded in the groove, forming a third silicon oxide film on the insidewall of the groove and rounding the shoulder edge of the groove at thesame time, (e) a step of removing the second silicon oxide film on thesilicon nitride film, while leaving the second silicon oxide film onlyin the groove, thereby forming an element isolation groove embedded withthe second silicon oxide film, and (f) a step of removing the siliconnitride film on the surface of the active region whose circumference isconfined by the element isolation groove, and then forming asemiconductor element in the active region.
 18. A process for producinga semiconductor device, which comprises the following steps: (a) a stepof thermally oxidizing a semiconductor substrate, thereby forming afirst silicon oxide film on the surface of the semiconductor substrate,then depositing a silicon nitride film on the first silicon oxide film,and then selectively etching the silicon nitride film, the first siliconoxide film and the semiconductor substrate residing in an elementisolation region, thereby trenching a groove on the surface of thesemiconductor substrate, (b) a step of etching the first silicon oxidefilm exposed to the inside wall of the groove, thereby recessing thefirst silicon oxide film from the inside wall of the groove towards anactive region to an extent of 5 to 40 nm, (c) A step of depositing asecond silicon oxide film on the surface of the semiconductor substrate,thereby embedding the second silicon oxide film in the groove, (d) astep of removing the second silicon oxide film on the silicon nitridefilm, while leaving the second silicon oxide film only in the groove,thereby forming an element isolation groove embedded with the secondsilicon oxide film, (e) a step of thermally oxidizing the semiconductorsubstrate, thereby sintering the second silicon oxide film embedded inthe groove, forming a third silicon oxide film on the inside wall of thegroove and rounding the shoulder edge of the groove at the same time,and (f) a step of removing the silicon nitride film on the surface ofthe active region whose circumference is confined by the elementisolation groove, and then forming a semiconductor element in the activeregion.
 19. A process producing a semiconductor device, which comprisesthe following steps: (a) A step of thermally oxidizing a semiconductorsubstrate, thereby forming a first silicon oxide film on the surface ofthe semiconductor substrate, then depositing a silicon nitride film onthe first silicon film, and then selectively etching the silicon nitridefilm, the first silicon oxide film and the semiconductor substrateresiding in an element isolation region while masking an element region,thereby trenching a groove on the surface of the semiconductorsubstrate, (b) a step of etching the first silicon oxide film exposed tothe inside wall of the groove, thereby recessing the first silicon oxidefilm from the inside wall of the groove towards an active region to anextent of 5 to 40 nm, (c) a step of thermally oxidizing thesemiconductor substrate, thereby forming a second silicon oxide film onthe inside wall of the groove just before fully filling the secondsilicon oxide film in the recess space formed up to the edge of therecessed first silicon oxide film, and rounding the shoulder edge of thegroove at the same time, (d) a step of depositing a polycrystallinesilicon film on the surface of the semiconductor substrate, (e) a stepof depositing a third silicon oxide film on the surface of thesemiconductor substrate, thereby embedding the third silicon oxide filmin the groove, (f) a step of heat-treating (or annealing) thesemiconductor substrate, thereby sintering the third silicon oxide filmembedded in the groove and oxidizing the polycrystalline silicon film toconvert at least a portion thereof to a silicon oxide film, (g) a stepof removing the third silicon oxide film and the silicon oxide film onthe silicon nitride film, while leaving the third silicon oxide film andthe silicon oxide film only in the groove, thereby forming an elementisolation groove embedded with the third silicon oxide film and thesilicon oxide film, and (h) a step of removing the silicon nitride filmon the surface of the active region whose circumference is confined bythe element isolation groove, and then forming a semiconductor elementin the active region.
 20. A process for producing a semiconductordevice, which comprises the following steps: (a) a step of thermallyoxidizing a semiconductor substrate, thereby forming a first siliconoxide film on the surface of the semiconductor substrate, thendepositing a silicon nitride film on the first silicon oxide film, andthen selectively etching the silicon nitride film, the first siliconoxide film and the semiconductor substrate residing in an elementisolation region while masking an element region, thereby trenching agroove on the surface of the semiconductor substrate, (b) a step ofetching the first silicon oxide film exposed to the inside wall of thegroove, thereby recessing the first silicon oxide film from the insidewall of the groove towards an active region to an extent of 5 to 40 nm,(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groovejust before fully filling the second silicon oxide film in the recessspace formed up to the edge of recessed first silicon oxide film androunding the shoulder edge of the groove at the same time, (d) a step ofdepositing a polycrystalline silicon film on the surface of thesemiconductor substrate, (e) a step of depositing a third silicon oxidefilm on the surface of the semiconductor substrate, thereby embeddingthe third silicon oxide film in the groove, (f) a step of removing thethird silicon oxide film and the polycrystalline silicon film on thesilicon nitride film, while leaving the third silicon oxide film and thepolycrystalline silicon film in the groove, thereby forming an elementisolation groove embedded with the third silicon oxide film and thepolycrystalline silicon film, (g) a step of heat-treating (or annealing)the semiconductor substrate, thereby sintering the third silicon oxidefilm embedded in the groove and oxidizing the polycrystalline siliconfilm to convert at least a portion thereof to a silicon oxide film, and(h) a step of removing the silicon nitride film on the surface of theactive region whose circumference is confined by the element isolationgroove, and then forming a semiconductor element in the active region.21. A process for producing a semiconductor device, which comprises thefollowing steps: (a) a step of oxidizing a semiconductor substrate,thereby forming a first silicon oxide film on the surface of thesemiconductor substrate, then depositing a silicon nitride film on thefirst silicon oxide film, and then selectively etching the siliconnitride film, the first silicon oxide film and the semiconductorsubstrate residing in an element isolation region while masking anelement region, thereby trenching a groove on the surface of thesemiconductor substrate, (b) a step of etching the first silicon oxidefilm exposed to the inside wall of the groove, thereby recessing thefirst silicon oxide film from the inside wall of the groove towards anactive region in an extent of 5 to 40 nm, (c) a step of heat-nitridingthe semiconductor substrate, thereby forming a second silicon nitride onthe inside wall of the groove, (d) a step of depositing a second siliconoxide film on the surface of the semiconductor substrate, therebyembedding the second silicon oxide film in the groove, (e) a step ofheat-treating (or annealing) the semiconductor substrate, therebysintering the second silicon oxide film embedded in the groove, (f) astep of removing the second silicon oxide film on the first siliconnitride film, while leaving the second silicon oxide film only in thegroove, thereby forming an element isolation groove embedded with thesecond silicon oxide film, and (g) a step of removing the first siliconnitride film on the surface of the active region whose circumference isconfined by the element isolation groove, and then forming asemiconductor element in the active region.
 22. A process for producinga semiconductor device, which comprises the following steps: (a) a stepof thermally oxidizing a semiconductor substrate, thereby forming afirst silicon oxide film on the surface of the semiconductor substrate,then depositing a silicon nitride film on the first silicon oxide film,and then selectively etching the silicon nitride film, the first siliconoxide film and the semiconductor substrate residing in an elementisolation region while masking an element region, thereby trenching agroove on the surface of the semiconductor substrate, (b) a step ofetching the first silicon oxide exposed to the inside wall of thegroove, thereby recessing the first silicon oxide film from the insidewall of the groove towards an active region in an extent of 5 to 40 nm,(c) a step of thermally oxidizing the semiconductor substrate, therebyforming a second silicon oxide film on the inside wall of the groove,and then nitriding the second silicon oxide film, thereby converting atleast a portion thereof to a silicon nitride film, (d) a step ofdepositing a third silicon oxide film on the surface of thesemiconductor substrate, thereby embedding the third silicon oxide filmin the groove, (f) a step of removing the third silicon oxide film onthe first silicon nitride film, while leaving the third silicon oxidefilm only in the groove, thereby forming an element isolation grooveembedded with the third silicon oxide film, and (g) a step of removingthe first silicon nitride film on the surface of the active region whosecircumference is confined by the element isolation groove, and thenforming a semiconductor element in the active region.
 23. A processproducing a semiconductor device, which comprises the following steps:(a) a step of thermally oxidizing a semiconductor substrate, therebyforming a first silicon oxide film on the surface of the semiconductorsubstrate, then depositing a silicon nitride film on the first siliconoxide film, and then selectively etching the silicon nitride film, thefirst silicon oxide film and the semiconductor substrate residing in anelement isolation region while masking an element region, therebytrenching a groove on the surface of the semiconductor substrate, (b) astep of etching the first silicon oxide film exposed to the inside wallof the groove, thereby recessing the first silicon oxide film from theinside wall of the groove towards an active region to an extent of 5 to40 nm, (c) a step of depositing a polycrystalline silicon film on thesemiconductor substrate, and then nitriding the polycrystalline siliconfilm, thereby converting at least a portion thereof to a silicon nitridefilm, (d) a step of depositing a second silicon oxide film on thesurface of the semiconductor substrate, thereby embedding the secondsilicon oxide film in the groove, (e) a step of heat-treating (orannealing) the semiconductor substrate, thereby sintering the secondsilicon oxide film embedded in the groove, (f) a step of removing thesecond silicon oxide film on the first silicon nitride film, whileleaving the second silicon oxide film only in the groove, therebyforming an element isolation groove embedded with the second siliconoxide film, and (g) a step of removing the first silicon nitride film onthe surface of the active region whose circumference is confined by theelement isolation groove, and then forming a semiconductor element inthe active region.